Arm Average Value Model of Hybrid MMC, Considering DC Fault and Internal Switch Failures

Hybrid half-bridge (HB) and full-bridge (FB) modular multilevel converter (MMC) is recognized for its capability to handle dc faults in high-voltage dc systems. However, two critical challenges in the hybrid MMC (H-MMC) require further investigation: internal switch failures and dc faults. This article proposes an arm average value model (AVM) for the H-MMC to analyze dc faults and internal switch failure conditions. In the proposed AVM, each arm comprises FB submodules (FB-SMs), HB submodules (HB-SMs), and internal-fault SM (IF-SM), the latter representing the SM with internal switch failure conditions. Unlike conventional AVMs, it accurately captures H-MMC dynamics under such failures as well as during transitions between blocking and deblocking modes. Modeling the internal switch failure is useful in capturing the dynamic behavior of IF-SM required for fault-detection methods and fault-tolerant control strategies. Furthermore, by accurate estimation of H-MMC behavior during the recovery process after blocking, this model is highly useful for the design and tuning of control strategies, especially under dc fault recovery. Conventional sorting and balancing algorithms are incompatible with this model because they do not account for failed SMs; therefore, a dedicated algorithm is developed to evaluate their impact on H-MMC performance. The validity of the proposed AVM is demonstrated through simulations in the MATLAB/Simulink environment and experimental validation using a scaled-down laboratory prototype.